Article by: Synopsys Inc.
The 8nm RF design reference stream improves time-to-result, quality-of-result and cost-of-result for next-generation RF design.
Enabling mutual customers to accelerate their development of advanced node RF designs for 5G/6G applications, Synopsys Inc. has developed an RF Design Reference Stream and Complementary Design Solution Kit (DSK) that improves productivity and accelerate design closure on Samsung Foundry’s 8nm RF low. – Power FinFET process. The 8nm RF Design Reference Stream, which includes tightly integrated solutions from Synopsys and Ansys, improves time-to-result, quality-of-result, and cost-to-result for next-generation RF design.
“Samsung’s latest RF solution, 8nm RF process technology, could significantly improve the performance and power efficiency of 5G communication chips,” said Sangyun Kim, vice president of Samsung Electronics’ Foundry Design Technology team. “We are delighted that the 8nm RF Design Reference Stream and Design Solutions Kit that we have developed in close collaboration with Ansys and Synopsys will help our joint customers meet the demands of increasing design complexity around the world. hyper-connected today.
Advanced node analog and RF designs are integral to the applications that power our digital world of smart everything. However, it can be complex and time-consuming to design these chips to meet the bandwidth and latency requirements of applications such as 5G/6G, automotive, and high-performance computing. Available today, the 8nm RF Design Reference Workflow streamlines the process with features that deliver faster layout design turnaround with industry-leading circuit simulation performance and layout productivity, as well as accurate electromagnetic (EM) modelling. The reference flow documents a proven methodology for RF design with Synopsys and Ansys tools that covers schematic design, simulation, layout, extraction, electromagnetic (EM) simulation, and physical verification.
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The associated DSK includes a collection of application notes, tutorials, and design examples that cover advanced design methodology topics, including parasitic analysis in design, on-chip inductor design, partial layout extraction and simulation and design reuse with templates.
Key components of the stream include the Synopsys Custom Design family of products, comprising the Synopsys Custom Compiler design and layout product, the Synopsys PrimeSim circuit simulation product, the Synopsys StarRC parasitic extraction validation product, and the Synopsys StarRC product. Synopsys IC Validator physical verification; Synthesis product of Ansys VeloceRF inductive components and transmission lines; and Ansys RaptorX and Ansys RaptorH, advanced nanometer EM analysis products.
“Ansys is excited to collaborate with Synopsys and Samsung on an advanced reference flow for RF design,” said Yorgos Koutsoyannopoulos, Vice President of Research and Development at Ansys. “Working seamlessly with Synopsys custom compiler design and PrimeSim simulation solutions, Ansys’ inductor design and EM extraction tools have the highest capability to handle the most challenging designs as well as the ability to model all advanced process effects and enable a complete end-to-end solution complete the RF design flow Together we deliver an intuitive and easy-to-use flow for block design, optimization and verification of RF design.
“Synopsys and Samsung have a history of working closely together to enable our joint customers to achieve smooth and productive design workflows for the latest Samsung technologies,” said Withek Sarkar, Vice President of Engineering at Synopsys. “Building on our close ties with Ansys, this new RF design reference stream and DSK streamline the process of developing the advanced wireless systems that will continue to drive our smart world.”